Central to virtually every computer system is the utilization of one or more clock signals for timing the various operations associated with the computer system. Every digital computer designed for synchronous operation has a master clock somewhere sending out one or more temporally regulated clock signals. A master clock may consist of an oscillator circuit as the source of the clock signal and a pulse generating circuit for shaping the clock signal. For most applications the clock signal is a square wave signal having regularly repeating high and low times.
Many features of the clock signal are of importance. For example, the rate at which the clock signal switches from high to low, the shape of the pulses in terms of rise and fall times for the leading and trailing edges, respectively, and the relationship or phasing between multiple signals are considered. Another feature which is of concern in some applications is the symmetry of the clock signal. What is meant by "symmetry" is the relationship between the high and low times. A perfectly symmetric clock signal would have high and low times that were the same. However, most clock signals are not perfectly symmetrical with either the high or low time exceeding the other. Certain recent microprocessor designs have imposed strict requirements on the symmetry of their input clocks. For example, one such microprocessor family requires the high and low times to be 20 nanoseconds with an allowable deviation of only +/-5%.